1. Field of the Invention
The invention relates to a thin film transistor and a method of fabricating the same. More particularly, the invention relates to a thin film transistor having an oxide channel layer and a method of fabricating the same.
2. Description of Related Art
Due to increasing concerns for the environment, flat display panels with superior characteristics such as low consumption power, high space utilization efficiency, free of radiation, high image quality and so on have become the main stream in the market. Conventional flat displays include liquid crystal displays, plasma displays, organic electroluminescent displays, and the like. Take the most common liquid crystal displays (LCDs) as an example, each LCD is mainly constituted by a thin film transistor (TFT) array substrate, a color filter substrate, and a liquid crystal layer sandwiched therebetween. In the conventional TFT array substrates, an amorphous silicon (α-Si) TFT or a low temperature polysilicon TFT is usually adopted as a switching device of each of a plurality of sub-pixels. In recent studies, oxide semiconductor TFTs have higher mobility comparing to α-Si TFTs and have better threshold voltage uniformity (Vth) comparing to low temperature TFTs. Thus, oxide semiconductor TFTs have the potential of becoming the key element in flat displays of the next generation.
FIGS. 1A to 1D are schematic cross-sectional diagrams illustrating a flow chart of fabricating a conventional oxide semiconductor TFT. Referring to FIGS. 1A to 1D sequentially, a buffering layer 101 is formed on a substrate 100, a gate 102 is formed on a partial region of the buffering layer 101, and a gate insulation layer 104 is formed entirely on the substrate 100 to cover the gate 102 as shown in FIG. 1A. An oxide semiconductor layer 106 is formed on the gate insulation layer 104 as shown in FIG. 1B. An excimer laser annealing process is performed by using a photomask M as a mask, so that a portion of the oxide semiconductor layer 106 not shielded by the photomask M is transformed into two ohmic contact layers 106b, and a portion of the oxide semiconductor layer 106 shielded by the photomask M retains the characteristics of semiconductors and forms an oxide channel layer 106a. The ohmic contact layers 106b are respectively located beside the oxide channel layer 106a and connected with the oxide channel layer 106a as depicted in FIGS. 1B and 1C. A source S and a drain D electrically insulated from each other are respectively formed on the gate insulation layer 104 and the ohmic contact layers 106b. Accordingly, the fabrication of the conventional oxide semiconductor TFT is complete.
However, the oxide semiconductor TFT fabricated with the process aforementioned has unstable electrical specification (the relationship between drain current and gate voltage). Thus, in known technology, in order for the oxide semiconductor TFT to maintain stable electrical specification, an annealing process such as a thermal annealing process or an excimer laser annealing process is usually performed to the oxide channel layer 106a after the foregoing process for the electrical specification of the oxide semiconductor TFT to be stable. Nevertheless, this process complicates the fabrication of the conventional oxide semiconductor TFT. Accordingly, researchers are trying to enhance the electrical specification of the oxide semiconductor TFT without increasing the complexity of the fabrication.